This invention relates to the field of microprocessor powered computers for video games and personal computing. The invention further relates to MOS (metal oxide semiconductor) technology, where circuit implementation is provided with chip area, i.e. chip size as a consideration. The invention also relates to a television digital display systems where one video bit of information is stored in memory for every element location of the picture (pixel), i.e. bit mapping.
Bit mapping, while space and time implementation consuming, is a straight forward and an accurate method for video display generation. Complex displays provided by video games and personal computers require overlay presentations of movable and/or changable information and of fixed information; and of collisions between movable objects. Bit map implementation has been the focus of various prior circuits.
Prior video game circuits have provided a complex display format to a television receiver display unit (a cathode ray tube), which display unit generates the presentation with a plurality of horizontal scans or raster lines. A video game circuit which is capable of displaying fixed objects as background as well as, moving objects is shown by Rosenthal, U.S. Pat. No. 4,053,740.
Rosenthal has built a special purpose digital computer to generate video game information from a plurality of selected, on a mutually exclusive basis, software defined programs. Operator commands are received and processed. Rosenthal's special purpose computer is separated into an independent computational section and an independent display section.
Dash et al, U.S. Pat. No. 4,034,983, show a video game circuit which receives operator commands from joy sticks (pots) and which generates and stores bit map information bearing a time-phase relationship to a television receiver raster-scan beam, which television receiver is being driven by the Dash circuit. Dash utilizes an analog mapping circuit connected to joy stick ports (pot ports), and a digital mapping circuit, to reset the television receiver raster-scan beam at appropriate times and to control display intensity thereby producing the game video display components.
Personal computers, such as the Apple Computer, have utilized a main microprocessor to perform computational operations and to process (retrieve) video display information to generate similar type displays as Dash to a television receiver.
The Apple Computer has incorporated a general purpose microprocessor, the MOS Technology Inc., Model 6502, to perform both computational operations and video display information retrieval. Such a single microprocessor driven system has speed limitations, as most microprocessors, including the 6502 have significant processing dead time used for refreshing registers and reseting and initializing operations. As a result, information processing in such systems can be slow.
One approach to increasing the speed of such a personal computer has been to utilize two processors. Cromenco Inc., has sold a personal computer containing two processors; a Motorola Inc., 68000 and a 6502. In this system, the first processor is dedicated to computational operations and the second microprocessor is dedicated to video display information retrieval.
Sukonick, U.S. Pat. No. 4,070,710, likewise, shows a two processor system. Sukonick has added a display system 16 to his programmed host computer 10. This video display system 16 contains an Intel Corporation 8088 microprocessor 76 within the micro control unit 22 of the video display system.
Along this line Burson, U.S. Pat. No. 4,180,805, has provided a video display circuit which incorporates a general purpose microprocessor 15, the TMS 1100 microcomputer, as shown in U.S. Pat. No. 3,988,604. A character memory is provided separate from a display memory. A display image is developed by the microcomputer and stored in the display memory where each display memory word is partitioned into two bytes, with the first of which being a character memory address and the second of which being a subaddress to locate a character-word within a set of character words in memory. Each character memory word is likewise partitioned into two bytes with the first byte determining color and the second byte selecting a particular character from a prestored set.
The use of a second general purpose commercially available microcomputer to process video display information, while increasing the system speed, also increases the cost of manufacture for the system. Further, it necessitates off-chip wire connections as each commercial circuit comes as a separate dual-in-line package (DIP). In LSI (large scale integration) circuit design this increases total system size, increases backplane and circuit card costs and increases the likelihood of noise pickup often necessitating additional filtering and increased signal levels, which usually leads to more power consumption.
Others have taken a divergent and different approach, such as using a display generator circuit designed as a raster scan line buffer structure. In such an approach, a general microprocessor can be used to address display object storage random access memory (RAM). The circuitry divides the display into moving objects (sprites) and into stationary playfield objects.
One specific design is shown by Hogan et al, U.S. Pat. No. 3,996,585, where a display generator is implemented with a plurality of buffer registers. He uses this display generator to process bit map information obtained from random access memory (RAM). A pattern generator is used to decode order data for each rastor scan line. Decoded rastor line data is stored in a buffer register for display. The pattern generator also decodes control data to determine collisions. The decoded collision control data is stored in a buffer register. Hogan's circuit is intended to relieve the system microprocessor from simple video display data retrieval and manipulation.
The Hogan circuitry is a departure from the two microprocessor approach of Sukonick; and a departure from the general purpose microprocessor driven display generators of Burson and Stubben et al. Hogan provides a special purpose circuit which can be implemented in LSI circuitry. It eliminates the cost of the second general purpose microprocessor and the card or board connection wiring thereto. Hogan's et al circuit, however, does require more memory including a large number of temporary storage registers.
In keeping with the display generator circuit approach of Hogan et al, others have built a decoder based video display generators. Such a circuit would not utilize a second general purpose microprocessor to drive a video generator, but may use display instruction decoder circuits to provide movable object and stationary playfield object information to the video display, thereby reducing the work on the only (general purpose) microprocessor present without the use of a second microprocessor. Any of these circuits, as with Hogan et al, require an increase in memory or storage space which is satisfied by a large number of registers. Some video display generators have their circuitry divided into a decoder(s), a RAM(s) and a register(s) for handling playfield fixed object data and into a decoder-selectors and registers for handling moving object data.
It is desirable to provide complex video presentations on a television receiver using less circuitry than these previous devices, and to provide faster processing circuitry more cheaply. Further it is desirable to define, in a new way, the video display data, so that it can be processed and combined complex video presentations using less expensive circuit structure.